# Fundamental of Boost Converter

Among the dc-dc power converters, boost converter topology is used to step-up the input voltage. Depending upon the conversion ratio, the output voltage is either equal to the input or higher than the input. Fig.1 shows the circuit for a boost converter.

Fig. 1: Boost converter circuit

We will make following assumptions while analyzing fig.2 circuit:

• The converter operates in steady state
• Inductor current is always positive meaning that the converter operates in continuous conduction mode (CCM)

Circuit when the MOS switch $M_1$ is ON, is shown in fig. 2 (top). Application of Kirchoff’s voltage and current laws yields following equations:

$-V_g + V_L + I_L\left(R_L + R_{on}\right) = 0$

$V_L = {V_g} - I_L\left(R_L + R_{on}\right)$

$i_c = -\frac{V}{R}$

Fig.2: Top – MOS switch ON (diode in reverse bias)
Bottom – MOS switch OFF (diode conducting)

When the MOS switch is OFF, as shown in fig. 2 (bottom), the energy stored in inductor is getting transferred to the capacitor.

$-V_g + V_L + I_LR_L + V = 0$

$V_L = V_g - V - I_LR_L$

$i_c = I_L - \frac{V}{R}$

Using capacitor charge balance, we know that the average capacitor current over one period in steady state is zero. That is,

$\left_{avg} = 0$

$\frac{-V}{R} DT_s + \left(I_L - \frac{V}{R}\right)\left(1-D\right)T_s = 0$

Solving the above algebraic equation gives us the average value of the inductor current over one cycle in steady state.

$I_L = \frac{V}{\left(1-D\right)R}$

Once again applying inductor-volt second balance, we know that the average inductor voltage over one cycle in steady state is zero. That is,

$\left_{avg} = 0$

$\left[V_g - I_L\left(R_L + R_{on}\right)\right]DT_s + \left[V_g - V - I_L R_L\right]\left(1-D\right)T_s = 0$

$V\left(1-D\right) + I_L\left(R_{on}D + R_L\right) = V_g$

Substituting for $I_L$ and solving for the output voltage $V$ yields

$V = \frac{V_g}{\left(1-D\right) + \frac{R_{on}D + R_L}{\left(1-D\right)R}}$

Notice that, if the MOS and inductor are considered to be ideal, then we get the ideal conversion equation:

$V = \frac{V_g}{1-D}$

Fig. 3: Relationship between duty cycle and output voltage

Fig. 3 shows a plot of duty cycle vs. output voltage using the ideal conversion equation. Here’s the input voltage $V_g$ is taken to be $1V$. Notice that when the duty cycle is zero, the output voltage is equal to that of the input voltage. As the duty cycle increases, the output voltage increases as well. Ideally, the output voltage can reach infinity.

Fig. 4: Inductor current waveform (Steady State)

We can now determine the ripple in inductor current as well as the output voltage. As shown in Fig. 4, in steady state, the inductor current changes from $I_{min}$ to $I_{max}$ for $0 \leq t \leq DT_s$. The relationship for inductor ripple current is simply given by the line-segment, that is,

$2\Delta i_L = (slope)*DT_s$

$\Delta i_L = \frac{1}{2L}\left[V_g - \frac{V}{\left(1-D\right)R}\left(R_L + R_{on}\right)\right]*DT_s$

$\Delta i_L = \frac{D}{2Lf_s} \left[V_g - \frac{V\left(R_L + R_{on}\right)}{\left(1 - D\right)R}\right]$

Above relationship can be used to determine the inductance $L$ during the design process, if the inductor current ripple constraint is known. The criteria that the converter operates in CCM is that the minimum inductor current stays positive, that is

$I_{L,min} \geq 0$

$I_L - \Delta i_L \geq 0$

$\frac{V}{\left(1 - D\right)R} \geq \frac{D}{2Lf_s}\left[\frac{V_g\left(1 - D\right)R - V\left(R_L + R_{on}\right)}{\left(1 - D\right)R}\right]$

$L_{min} \geq \frac{D}{2Vf_s}\left[V_g\left(1 - D\right)R - V\left(R_L + R_{on}\right)\right]$

The above relationship determines the minimum value for the inductance such that the converter operates in CCM. Usually, the choosen value of inductance is at least 15 to 20 % greater than $L_{min}$. This is just to ensure that the converter doesn’t enter into discontinuous mode in the presence of disturbances.

Last but not the least is the output voltage ripple. Using the equations for $i_C$, we get the plot for capacitor voltage $v_C$ as shown in Fig. 5

Fig. 5: Capacitor voltage waveform (Steady state)

Capacitor voltage ripple = slope * time period

$-2\Delta v_C = \frac{-V}{RC} * DT_s$

$\Delta v_C = \frac{V*D}{2RCf_s}$

Above equation determines the selection of the capacitance. Notice that as the switching frequency increase, the capacitance goes down, which makes them ideal to be integrated into ICs.

## 5 comments on “Fundamental of Boost Converter”

1. M.R.T

Please, can you provide a book or reference for the above theory. It would be much aprreciated.

Thanks.

2. ScienceSamovar

On a fig.2. bottom picture please edit the polarity of inductor – it’s (+)=(-), then it adds up to Vg and steps-up the voltage.

3. Very Nice website. I recently engineered mine and that i was craving for some ideas and you gave me a number of. might i raise you whether or not you developed the web site by youself ?

4. suidutrateco